Digital wideband (WB) systems (including ultra-wideband—UWB—systems) are highly desirable, offering flexibility and programmability. However, while system data rates and bandwidths continue to expand, analog-to-digital converters (ADCs) are limited in bandwidth, resolution, and power consumption. Currently available architectures used in the fabrication of ADCs include flash architecture, which is based on parallel techniques that use 2b−1 comparators to achieve “b” bits of resolution. While comparators can sample analog input signals simultaneously, this can increase the speed of the flash ADC. Because of the parallelism of this architecture, the number of comparators can grow exponentially with b, thus increasing the power consumption and also the circuitry area. This can facilitate an increase in the input capacitance limiting the system bandwidth, thereby increasing the difficulty to match components.
Some variations of flash architecture such as the folded-flash, pipelined and time interleaved architectures have been proposed in order to overcome some of these problems. However these techniques are also not without difficulties that have slowed the evolution of ADCs such as aperture jitter or aperture uncertainty, which is the sample-to-sample variation of the instant in time at which sampling occurs. Moreover, the speed of sampling can be limited by the frequency characteristic of the device used in the design, which can limit the ability of the comparators to make an unambiguous decision about the input voltage.
To overcome these problems, techniques that aim to relax the operational conditions of the ADC have been proposed. Low-resolution ADC is possible with sigma-delta modulation. The noise penalty associated with the use of a few bits or less in the quantization process is overcome in the sigma-delta scheme by using either signal oversampling or multi-band processing techniques. In particular, when a single bit is used, the implementation is greatly simplified and practical mono-bit WB (or UWB) digital communications receivers have significant potential. These techniques generally utilize sampling at or above the Nyquist rate over the full signal bandwidth, and can therefore suffer from the aforementioned high-speed issues. In addition, they provide a single WB (or UWB) serial data stream, which may stress the digital signal processing following the ADC.
An alternative is to channelize the analog signal by means of a bank of bandpass filters, and the output of each filter are sampled in parallel. Multi-rate approaches can also be used. ADC thus can occur at a reduced rate for each of the resultant bandpass signals. The bandpass outputs can also be frequency translated to baseband, allowing the use of a single lowpass filter design. However, the bandpass analog filter bank design is difficult, and the resulting non-ideal filters cause signal leakage across the bands that can degrade overall system performance unless properly accounted for. The design of analog filters with sharp roll-off needed in the multi-band ADC approaches also suffers from power consumption and large circuitry area to accommodate the passive elements (i.e., inductors and capacitors). Additionally, implementation of the bank of bandpass filters in the multi-band processing ideas can be potentially troublesome; problems such as spectrum sharing due to the non-ideal characteristics of the bandpass filters can affect the overall system performance.
High-speed signal processing utilized in analog to digital (A/D) conversion of wideband signals (and ultra-wideband signals) imposes challenging implementation problems, and sometimes impractical power consumption. Current time-domain A/D conversion encounters technological barriers as time-domain signal features shrink to very fine resolution, on the order of tenths, and sometimes hundredths of nanoseconds. In order to overcome these problems, techniques that aim to relax the speed of the A/D conversion have been proposed. In general, these techniques perform multi-band signal processing in which the spectrum of the signal is channelized into several bands by means of a bank of bandpass filters. A/D conversion thus occurs at a much reduced speed for each one of the resultant bandpass signals.
Further, a bank of frequency modulators can be used to shift the signal spectrum so that the center frequency of each sub-band tends toward zero frequency, allowing the use of a bank of identical low-pass filters. Sigma-delta modulation has also been proposed since it enables A/D conversion with low-resolution. The noise penalty associated with the use of few bits in the quantization process is overcome in the sigma-delta scheme by using either signal oversampling or multi-band processing techniques. In particular, when a single bit is used, the implementation is greatly simplified and practical mono-bit digital receivers can be implemented. Since all these techniques are based on time-domain A/D conversion, they suffer from high-speed limitations, making it desirable to channelize the signal spectrum into several sub-bands.
Thus, a heretofore-unaddressed need exists in the industry to address the aforementioned deficiencies and inadequacies.